To work, any chip must meet a temperature range, which refers to the temperature on the silicon wafer, commonly known as junction temperature.

Altera’s FPGA is divided into commercial grade and industrial grade. The junction temperature range for commercial grade chips to work normally is 0 ~ 85 ℃, while the range for industrial grade chips is – 40 ~ 100 ℃. In the actual circuit, we must ensure that the junction temperature of the chip is within its tolerable range.

With the increasing power consumption of the chip, more and more heat will be generated when working. If we want to keep the junction temperature of the chip within the normal range, we need to take some methods to make the heat generated by the chip quickly radiate into the environment.

Those who have studied physics in middle school know that there are three main methods for heat transfer, namely conduction, convection and radiation. These methods are also used for chip outward heat dissipation.

The following figure shows a simplified model of chip heat dissipation. The heat generated by the chip in the figure is mainly transmitted to the external package of the chip. If there is no heat sink attached, it will be directly distributed to the environment by the chip package shell; If a heat sink is added, the heat will be transferred from the outer package of the chip to the heat sink through the heat sink glue, and then transferred to the environment by the heat sink. Generally speaking, the surface area of the heat sink is quite large, and the contact surface with the air is large, which is conducive to heat transfer. In normal practice, it has been found that the vast majority of heat sinks are black. Because black objects are easy to radiate heat, it is also conducive to the outward dissipation of heat. And the faster the wind speed on the surface of the heat sink, the better the heat dissipation.

Simplified chip heat flow model

In addition, a small part of the heat is transmitted to the solder ball of the chip through the chip substrate, and then the heat is sent to the environment through the PCB. Since the proportion of this part of heat is relatively small, this part is ignored when discussing the thermal resistance of chip packaging and heat sink below.

First of all, we need to understand the concept of “thermal resistance”. Thermal resistance is the ability to describe the heat conduction of an object. The smaller the thermal resistance, the better the heat conductivity, and vice versa. This is somewhat similar to the concept of resistance.

From the silicon chip of the chip to the thermal resistance of the environment, assuming that all the heat is finally dispersed into the environment by the heat sink, a simple thermal resistance model can be obtained, as shown in the following figure:

Chip heat dissipation model with heat sink

The total thermal resistance from the silicon wafer to the environment is called JA, so it meets the following requirements:


JC refers to the thermal resistance from the chip to the external package, which is generally provided by the chip supplier; CS refers to the thermal resistance of the external package of the chip to the heat sink. If the heat sink is attached to the chip surface with thermal conductive adhesive, this thermal resistance is the thermal resistance of the guiding thermal adhesive, which is generally provided by the thermal conductive adhesive supplier; SA refers to the thermal resistance from the heat sink to the environment. Generally, the heat sink manufacturer gives this thermal resistance value, which decreases with the increase of wind speed. The manufacturer usually gives the thermal resistance value under different wind speeds.

The package of the chip itself is used as a heat dissipation device. If there is no heat sink on the chip, JA is the thermal resistance value of the silicon wafer after external packaging and then to the environment. This value is obviously greater than the JA value with heat sink. This value depends on the packaging characteristics of the chip itself, which is generally provided by the chip manufacturer.

The following figure shows the package thermal resistance of Altera’s Stratix IV device. The JA values of the chip under various wind speeds are given, which can be used to calculate the situation without radiator. In addition, JC is used to calculate the total JA value with heat sink.

Thermal resistance of Stratix IV device package

Assuming that the power consumed by the silicon wafer is p, then:

TJ (junction temperature) = TA + p * ja

The TJ must not exceed the maximum junction temperature allowed by the chip, and then the maximum allowable requirements for JA can be calculated according to the ambient temperature and the actual power consumed by the chip.

Jamax = (Tjmax – TA) / P ta (ambient temperature)

If the JA of the chip package itself is greater than this value, it must be considered to add a suitable heat dissipation device to the chip to reduce the effective JA value from the chip to the environment and prevent the chip from overheating.

In the actual system, part of the heat will also be dissipated from the PCB. If the PCB has many layers and a large area, it is also very conducive to heat dissipation.

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